The Read File Dialog provides controls to set all the read command options. These options are:

FIlename: The name of the HDL file to read

Namespace: If the HDL file contains more than one namespace (i.e. Module or Entity/Architecture), you can specify the namespace to be processed. If Namespace is left blank, all namespaces in the file will be processed.

Format: Language type of the HDL file to process. Currently, only Verilog is supported.

Lint Checks: When this checkbox is enabled, X-Amin will perform checks of coding style. The lint checks are user-definable through either the Preferences Dialog or by clicking the Set button on the Read Dialog. The Lint Checks setting dialog is shown below:

Check Ports: Performs port checks

Check Signals: Performs checks on signals

Check Subprograms: Performs checks on subprograms (tasks/procedures and functions).

Check Sensitivity Lists: Verifies that all signals referenced in a combinational concurrent block (always or process) appear in the block's sensitivity list.

Check Name Shadowing: Verifies that signal names in subprograms (functions, tasks or procedures) are not the same as a name in the parent namespace.

Check Assignment Sizes: Verifies that the vector size on the RHS of an assignment is the same as the target vector size.

Max If-Depth: Verifies that IF-statements are not nested to a depth greater than specified. A 0 indicates unlimited IF-statement nesting.

Check Identifiers: Verifies that the identifiers meet a user-specified format. The identifier specifications are created using Regular Expressions.

Synthesis Checks: When this checkbox is enabled, X-Amin will produce warnings for code structures that are not commonly synthesizable.

Translations Checks: When this checkbox is enabled, X-Amin will produce warnings for code structures which are not typically translatable to a target HDL language (Verilog to VHDL or VHDL to Verilog).

Verilog Defines:

Defines a variable and optionally sets its value. This is intended to be used with Verilog source files where code is optionally included based on defined variables (i.e. the #define pre-processor directive).

Include Paths:

Include Path: Specifies a path for included code or libraries.

read Command

Files can also be read into X-Amin using the read command entered in the GUI Command Entry box or on the command line in command-line mode. The read command format is:

SYNTAX
 (void) Read
   [-vlog | -vhdl]
   [-D <variable>[=<value>]]
   [-I <path>]
   [-design <design name>]
   [<lint options>]
   [-name <namespace>]
   [-synth]
   [-trans]
   <filename> [<filename>....]

ARGUMENTS
 [-vlog | -vhdl]
   Specifies the format of the HDL file. The default
   is -vlog

 [-D <variable>[=<value>]]
   Defines a variable and optionally sets its value to
   <value>. This is intended to be used with Verilog
   source files where code is optionally included
   based on defined variables (i.e. the #define
   pre-processor directive).

 [-I path]
   Specifies a path for included code or libraries.
   May be specified multiple times.

 [-design <design name>]
   Specifies the design name within X-Amin that the
   file should be read into.

 [<lint options>]
   Specifies lint checks to be performed. Valid checks
   are:
     -lint_all: perform all lint checks
     -lint_ports: perform port checks
     -lint_signals: perform signal name checks
     -lint_subprograms: perform subprogram checks
     -lint_sensitivity: verify sensitivity list completeness
     -lint_shadow: identify shadowed signal names
     -lint_assign: check LHS/RHS sizes
     -lint_ifdepth: check large if-nesting

 [-name <namespace>]
   If the file contains more than one entity or module
   definition, -name can be used to read in only the
   designated <namespace>

 [-synth]
   Enables checking of code constructs to ensure that
   they are synthesizable

 [-trans]
   Enables checking of code constructs to ensure that
   they are translatable (Verilog to VHDL or VHDL to
   Verilog)

 <filename>[<filename>...]
   List of filenames to be read in.